Primary
❪֎₄❫ LC-3 Instructions ○｜Definition｜1st｜20260110091713-00-⌔
Little Computer 3 - Wikipedia#Instruction_set
Instruction set
The LC-3 instruction set implements fifteen types of instructions, with a sixteenth opcode reserved for later use. The architecture is a load-store architecture; values in memory must be brought into the register file before they can be operated upon.
Arithmetic instructions available include ADD, bitwise AND, and bitwise NOT, with the first two of these able to use both registers and sign-extended immediate values as operands. These operations are sufficient to implement several basic arithmetic operations, including subtraction (by negating values) and bitwise left shift (by using the addition instruction to multiply values by two). The LC-3 can also implement any bitwise logical function, because NOT plus AND, together, are a logically complete function.
Memory accesses can be performed by computing addresses based on the current value of the program counter (PC) or a register in the register file; additionally, the LC-3 provides indirect loads and stores, which use a piece of data in memory as an address to load data from or store data to. Values in memory must be brought into the register file before they can be used as part of an arithmetic or logical operation.
The LC-3 provides both unconditional and conditional control flow instructions. Unconditional branches may move execution to a location given by a register value or a PC-relative offset. Three instructions (JSR, JSRR, and TRAP) support the notion of subroutine calls by storing the address of the code calling the subroutine into a register before changing the value of the program counter. The LC-3 does not support the direct arithmetic comparison of two values. Conditional branches are based on the arithmetic sign (negative, zero, or positive) of the last piece of data written into the register file. Computing the difference of two register values requires finding the negated equivalence of one register value and then adding the negated number to the positive value in the second register. The difference between the two registers would be stored in one of the 8 registers available for the user. Then the sign of this stored value will be used for the conditional branching.
Because there is no room left in the LC-3 instruction set for dedicated port-mapped I/O instructions, hardware implementations typically reserve part of the memory map for memory-mapped I/O.1
Printed 2026-06-28.
Link to original Footnotes
Yuan-Jhang Liao and Wing-Kwong Wong. “Using LC-3 Soft Core on an FPGA Development Board for Microprocessor Labs”. 2013. p. 612-613 of “Intelligent Technologies and Engineering Systems”. ↩
Secondary
• • •